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.. _amdgpu_synid_gfx90a_soffset_02ec85:
soffset
=======
An unsigned offset from the base address. May be specified as either a register or a 20-bit immediate.
Note that an *immediate* offset may be specified using either :ref:`uimm20<amdgpu_synid_uimm20>` operand or :ref:`offset20u<amdgpu_synid_smem_offset20u>` modifier, but not both.
*Size:* 1 dword.
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`uimm20<amdgpu_synid_uimm20>`
Generated by dwww version 1.15 on Sat May 18 10:36:43 CEST 2024.