AMDGPU Instructions Notation¶
Introduction¶
This is an overview of notation used to describe syntax of AMDGPU assembler instructions.
This notation mimics the syntax of assembler instructions except that instead of real operands and modifiers it provides references to their description.
Instructions¶
Notation¶
This is the notation used to describe AMDGPU instructions:
Opcode¶
Notation¶
TBD
Operands¶
An instruction may have zero or more operands. They are comma-separated in the description:
The order of operands is fixed. Operands cannot be omitted except for special cases described below.
Notation¶
An operand is described using the following notation:
<kind><name><tag0><tag1>…
Where:
kind is an optional prefix describing operand kind.
name is a link to a description of the operand.
tags are optional. They are used to indicate special operand properties.
Operand Kinds¶
Operand kind indicates which values are accepted by the operand.
Operands which only accept vector registers are labelled with ‘v’ prefix.
Operands which only accept scalar values are labelled with ‘s’ prefix.
Operands which accept both vector registers and scalar values have no prefix.
Examples:
vdata // operand only accepts vector registers
sdst // operand only accepts scalar registers
src1 // operand accepts both scalar and vector registers
Modifiers¶
An instruction may have zero or more optional modifiers. They are space-separated in the description:
The order of modifiers is fixed.
Notation¶
A modifier is described using the following notation:
<name>
Where name is a link to a description of the modifier.